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Volumn , Issue , 2001, Pages 183-192
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A memory coherence technique for online transient error recovery of FPGA configurations
a a |
Author keywords
Error Recovery; Fault Tolerance; FPGA; Memory Coherence
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Indexed keywords
COMPUTER HARDWARE;
ERROR CORRECTION;
LOGIC GATES;
MICROPROCESSOR CHIPS;
PARALLEL PROCESSING SYSTEMS;
STATIC RANDOM ACCESS STORAGE;
TABLE LOOKUP;
MEMORY COHERENCE TECHNIQUES;
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 0035007821
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/360276.360344 Document Type: Conference Paper |
Times cited : (22)
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References (21)
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