MOS fully analog reinforcement neural network chip

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 3, Issue , 2001, Pages 237-240

  Al Nsour, Mahmoud ^a   Abdel Aty Zohdy, Hoda S ^a  

^a OAKLAND UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN AND IMPLEMENTATIONS; GAS RECOGNITION; OFF-CHIP; SIGNAL SWINGS; SILICON AREA; SUB-CIRCUITS; SYSTEM IMPLEMENTATION; SYSTEM-ON-A-CHIP;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; REINFORCEMENT; SILICON; ADDERS; CMOS INTEGRATED CIRCUITS; GENETIC ALGORITHMS; MICROPROCESSOR CHIPS; MOS DEVICES; SIGNAL PROCESSING; VLSI CIRCUITS;

NEURAL NETWORKS;

ANALOG REINFORCEMENT NEURAL NETWORK CHIPS;

EID: 0035007817     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921291     Document Type: Conference Paper

References (12)

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