|
Volumn , Issue , 2001, Pages 69-74
|
Detailed routing architectures for embedded programmable logic IP cores
a a |
Author keywords
Detailed Routing; Embedded Cores; FPGA; Programmable Logic; SoC Design
|
Indexed keywords
FIELD PROGRAMMABLE GATE ARRAYS;
LOGIC DESIGN;
ROUTERS;
VLSI CIRCUITS;
PROGRAMMABLE LOGIC CORES;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
|
EID: 0035005399
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/360276.360300 Document Type: Conference Paper |
Times cited : (11)
|
References (14)
|