A systematic algorithm for the design of multiplierless FIR filters

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 2, Issue , 2001, Pages 185-188

  Yli Kaakinen, Juha ^a   Saramaki, Tapio ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

COEFFICIENT REPRESENTATION; FILTER PARAMETER; FINITE-IMPULSE RESPONSE; LINEAR PROGRAMMING ALGORITHM; MULTIPLIER-LESS; MULTIPLIER-LESS FIR FILTERS; PARAMETER SPACES;

ALGORITHMS; FIR FILTERS;

ADDERS; ALGORITHMS; DIGITAL ARITHMETIC; FREQUENCY RESPONSE; LINEAR PROGRAMMING; MULTIPLYING CIRCUITS; VLSI CIRCUITS;

MULTIPLIERLESS DESIGNS;

EID: 0034998841     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921038     Document Type: Conference Paper

References (14)

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