An efficient model for frequency-dependent on-chip inductance

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 2001, Pages 115-120

  Xu, M ^a   He, L ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CASCADE CONNECTIONS; ITERATIVE METHODS; MICROPROCESSOR CHIPS;

COPLANAR WIRES; MUTUAL INDUCTANCE;

INDUCTANCE MEASUREMENT;

EID: 0034998210     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368122.368887     Document Type: Conference Paper

References (19)