Effects of substrate design on underfill voiding using the low cost, high throughput flip chip assembly process

Proceedings of the International Symposium and Exhibition on Advanced Packaging Materials Processes, Properties and Interfaces

Volumn , Issue , 2001, Pages 51-56

  Milner, D ^a   Baldwin, D F ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSTS; FLIP CHIP DEVICES; PROCESS CONTROL; SUBSTRATES; SURFACE MOUNT TECHNOLOGY; THROUGHPUT;

UNDERFILLS;

CHIP SCALE PACKAGES;

EID: 0034996986     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)