Two floating resistor circuits and their applications to synaptic weights in analog neural networks

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 1, Issue , 2001, Pages 564-567

  Tantry, Shashidhav ^a   Yoneyama, Teru ^a   Asai, Hideki ^a  

^a SHIZUOKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

NEGATIVE RESISTANCE; NEURAL NETWORKS; TIMING CIRCUITS; MOSFET DEVICES; OPERATIONAL AMPLIFIERS; RESISTORS; TRANSCONDUCTANCE;

ANALOG NEURAL NETWORK; FLOATING RESISTOR; LIMIT-CYCLE; ONE-NUMBER; SYNAPTIC WEIGHT;

RESISTORS; ELECTRIC NETWORK ANALYSIS;

FLOATING RESISTORS; SYNAPTIC WEIGHTS;

EID: 0034996839     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921918     Document Type: Conference Paper

References (8)

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