|
Volumn , Issue , 2001, Pages 56-61
|
Preferred direction Steiner trees
|
Author keywords
[No Author keywords available]
|
Indexed keywords
INTERCONNECTION NETWORKS;
OPTIMIZATION;
ROUTERS;
VLSI CIRCUITS;
INTERCONNECT OPTIMIZATION;
MINIMUM SPANNING TREE;
INTEGRATED CIRCUIT LAYOUT;
|
EID: 0034996128
PISSN: 10661395
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/368122.368797 Document Type: Conference Paper |
Times cited : (9)
|
References (10)
|