Design diversity for concurrent error detection in sequential logic circuits

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2001, Pages 178-183

  Mitra, S ^a   McCluskey, E J ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPARATOR CIRCUITS; COMPUTATIONAL COMPLEXITY; DATA REDUCTION; ERROR DETECTION; FAILURE ANALYSIS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN;

CONCURRENT ERROR DETECTION; DATA INTEGRITY ANALYSIS; PARITY CHECKERS; STATE ENCODING;

SEQUENTIAL CIRCUITS;

EID: 0034994974     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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