Evaluation of the impact of mechanical stress on CMOS device mismatch

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2001, Pages 1-5

  Schaper, U ^a   Linnenbank, C ^a   Kollmer, U ^a   Mulatz, H ^a   Mensing, T ^a   Schmidt, R ^a   Tilgner, R ^a   Thewes, R ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DIFFERENTIAL EQUATIONS; ELECTRIC CURRENT MEASUREMENT; ELECTRIC RESISTANCE; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INTERCONNECTION NETWORKS; RESISTORS; SHIFT REGISTERS; STRESS ANALYSIS; TRANSISTORS; VOLTAGE MEASUREMENT;

BEAM BENDING TECHNIQUE; DEVICE UNDER TEST; FRONTEND PROCESSING; VOLTAGE DROP;

CMOS INTEGRATED CIRCUITS;

EID: 0034865589     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)