Address code generation for digital signal processors

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 353-358

  Udayanarayanan, S ^a   Chakrabarti, C ^a  

^a ARIZONA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); DIGITAL SIGNAL PROCESSING; HEURISTIC METHODS; OPTIMIZATION; PROGRAMMING THEORY;

ADDRESS CODE GENERATION;

DATA STORAGE EQUIPMENT;

EID: 0034857667     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.378521     Document Type: Conference Paper

References (12)

1. DSP address optimization using a minimum cost circulation technique
2. Mediabench: A tool for evaluating and synthesizing multimedia and communications systems
3. A uniform optimization technique for offset assignment problems
4. Algorithms for address assignment in DSP code generation
5. Storage assignment to decrease code size
6. A faster strongly polynomial minimum cost flow algorithm
7. Analysis and evaluation of address arithmetic capabilities in custom DSP architectures