Teaching future verification engineers: The forgotten side of logic design

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 253-255

  Ozguner, Fusun ^a   Marhefka, Duane ^a   DeGroat, Joanne ^a   Wile, Bruce ^b   Stofer, Jennifer ^b   Hanrahan, Lyle ^b  

^a The Ohio State University   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; CURRICULA; DIGITAL COMPUTERS; LOGIC DESIGN; STUDENTS; TECHNICAL PRESENTATIONS;

FUNCTIONAL VERIFICATIONS; HARDWARE DESIGN;

ENGINEERING EDUCATION;

EID: 0034854036     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2001.156145     Document Type: Article

References (3)

1. Tackling functional verification for virtual components
2. New SoC verification techniques