A 333-MHz dual-MAC DSP architecture for next-generation wireless applications

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 2, Issue , 2001, Pages 1013-1016

  Kolagotla, Ravi K ^a   Fridman, Jose ^a   Hoffman, Marc M ^a   Anderson, William C ^a   Aldrich, Bradley C ^a   Witt, David B ^a   Allen, Michael S ^a   Dunton, Randy R ^a   Booth, Lawrence A ^a  

^a ANALOG DEVICES INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER STORAGE; INTERFACES (COMPUTER); MICROCONTROLLERS; MOBILE TELECOMMUNICATION SYSTEMS; MULTIMEDIA SYSTEMS; PIPELINE PROCESSING SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; STATIC RANDOM ACCESS STORAGE; WIRELESS TELECOMMUNICATION SYSTEMS;

ARITHMETIC LOGIC UNIT; FRIO CORE; NEXT GENERATION WIRELESS TELECOMMUNICATIONS; PACKED BYTE INSTRUCTIONS;

DIGITAL SIGNAL PROCESSING;

EID: 0034846995     PISSN: 15206149     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICASSP.2001.941089     Document Type: Article

References (1)