An advanced timing characterization method using mode dependency

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 657-660

  Yalcin, H ^a   Palermo, R ^a   Mortazavi, M ^a   Bamji, C ^a   Sakallah, K ^a   Hayes, J ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; DATA PROCESSING; NETWORK PROTOCOLS; SEQUENTIAL CIRCUITS; VECTORS;

CONTROL INPUTS; TIMING CHARACTERIZATION;

TIMING CIRCUITS;

EID: 0034841399     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. Timing analysis using functional relationships
2. Path sensitization in critical path problem
3. Computation of floating-mode delay in combinational circuits: Theory and algorithms
4. Delay characterization of combinational modules by functional arrival time analysis
5. Timing abstraction of intellectual property blocks
6. Event propagation conditions in circuit delay computation
7. Functional timing analysis for IP characterization
8. Fast and accurate timing characterization using functional information