LeadFrameOnChip offers integrated power bus and bond over active circuit

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 2001, Pages 65-68

  Efland, T ^a   Abbott, D ^a   Arellano, V ^a   Buschbom, M ^a   Chang, W ^a   Hoffart, C ^a   Hutter, L ^a   Mai, Q ^a   Nishimura, I ^a   Pendharkar, S ^a   Pierce, M ^a   Shen, C C ^a   Thee, C M ^a   Vanhorn, H ^a   Williams, C ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; CMOS INTEGRATED CIRCUITS; ELECTROPLATING; PASSIVATION; SCANNING ELECTRON MICROSCOPY;

ACTIVE CIRCUITS;

POWER INTEGRATED CIRCUITS;

EID: 0034837945     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Smart power approaches VLSI complexity
2. Scaling issues in lateral power MOSFETs
3. Lateral thinking about power devices (LDMOS)
4. Energy capability of power devices with Cu layer integration
5. Advanced power copper technology for SMARTMOS™ application design