Parameterized models for a RF chip-to-substrate interconnect

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2001, Pages 831-838

  Doerr, Ingo ^a   Hwang, Lih Tyng ^b   Sommer, Grit ^a   Oppermann, Hermann ^a   Li, Li ^b   Petras, Michael ^b   Korf, Sabine ^a   Sahli, Faical ^a   Myers, Tom ^b   Miller, Mel ^b   John, Werner ^a  

^a FRAUNHOFER IZM   (Germany)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; OPTIMIZATION;

DESIGN OF EXPERIMENT; PARAMETERIZED ELECTRICAL COMPACT;

ELECTRONICS PACKAGING;

EID: 0034836019     PISSN: 05695503     EISSN: None     Source Type: Journal    
DOI: 10.1109/ECTC.2001.927883     Document Type: Article

References (10)

1. Cadence and amkor announce alliance to provide system-in-package -- SiP -- Technology solutions
2. Wideband crosstalk analysis of coupled bondwires buried in high-speed plastic packages
3. High frequency measurements and simulations on wire-bonded modules on the sequential build-up boards (SBU's)
4. Analysis of ground bond wire arrays for RFICS
5. Wire bond loop profile development for fine pitch-long wire assembly
6. Wire bond - Flip chip - Chip size package verbindungstechniken im vergleich
7. Electromagnetic simulation of bonding wires and comparison with wide band measurements
8. A fast 3D modeling approach to parasitics extraction of bonding wires for RF circuits