Explicit lower bound of 4.5n - o(n) for Boolean circuits

Conference Proceedings of the Annual ACM Symposium on Theory of Computing

Volumn , Issue , 2001, Pages 399-408

  Lachish, O ^a   Raz, R ^a  

^a WEIZMANN INSTITUTE OF SCIENCE   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMBINATORIAL MATHEMATICS; COMPUTATIONAL COMPLEXITY; LOGIC GATES; POLYNOMIALS; PROBABILISTIC LOGICS; POLYNOMIAL APPROXIMATION; TIMING CIRCUITS;

BOOLEAN CIRCUITS;

LOGIC CIRCUITS; BOOLEAN FUNCTIONS;

CIRCUIT COMPLEXITY; COMBINATORIAL PROPERTIES; DETERMINISTICS; LOW BOUND; NOT GATE; OR GATES; POLYNOMIAL-TIME;

EID: 0034830275     PISSN: 07349025     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. The synthesis of two-terminal switching circuits
2. A 4n lower bound on the combinatorial complexity of certain symmetric Boolean functions over the basis of unate dyadic Boolean functions