Thermal stability of PVD TiN gate and its impacts on characteristics of CMOS transistors

International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings

Volumn , Issue , 2001, Pages 36-39

  Wang, M F ^a   Kao, Y C ^a   Huang, T Y ^a   Lin, H C ^a   Chang, C Y ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; HIGH TEMPERATURE EFFECTS; ION IMPLANTATION; LEAKAGE CURRENTS; PHYSICAL VAPOR DEPOSITION; RAPID THERMAL ANNEALING; SEMICONDUCTOR JUNCTIONS; SPUTTER DEPOSITION; THERMODYNAMIC STABILITY; TITANIUM NITRIDE;

PLOY DEPLETION EFFECTS (PDE);

GATES (TRANSISTOR);

EID: 0034829257     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)