RS-FDRA: A register sensitive software pipelining algorithm for embedded VLIW processors

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 2001, Pages 67-72

  Akturan, C ^a   Jacome, M F ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

Embedded systems; Optimizing compilers; Retiming; Software pipelining; VLIW processors

Indexed keywords

ALGORITHMS; COMPUTER SOFTWARE; CONSTRAINT THEORY; EMBEDDED SYSTEMS; ENCODING (SYMBOLS); OPTIMIZATION; PROGRAM COMPILERS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

SOFTWARE PIPELINING;

PIPELINE PROCESSING SYSTEMS;

EID: 0034827203     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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