Reference idempotency analysis: A framework for optimizing speculative execution

Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Volumn , Issue , 2001, Pages 2-11

  Seon Wook Kim, ^a   Ooi, C L ^a   Eigenmann, R ^a   Falsafi, B ^a   Vijaykumar, T N ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; MULTIPROCESSING PROGRAMS; PROGRAM COMPILERS;

MULTITHREAD ARCHITECTURES;

PARALLEL PROCESSING SYSTEMS;

EID: 0034826235     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

1. Parallel programming with polaris
2. Speculative versioning cache
3. Techniques for speculative run-time parallelization of loops
4. Maximizing multiprocessor performance with the SUIF compiler
5. Data speculation support for a chip multiprocessors
6. Multiplex: Unifying conventional and speculative thread-level parallelism on a chip multiprocessor
7. The LRPD test: Speculative run-time parallelization of loops with privatization and reduction parallelization
8. Multiscalar processors
9. A scalable approach to thread-level speculation
10. MAJC architecture tutorial
11. Automatic array privatization
12. Task selection for a multiscalar processor