A practical, flip-chip, multi-layer pre-encapsulation technology for wafer-scale underfill

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2001, Pages 777-781

  Burress, R V ^a   Capote, M A ^a   Lee, Y J ^a   Lenos, H A ^a   Zamora, J F ^a  

^a Aguila Technologies Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS INDUSTRY; ELECTRONICS PACKAGING; FLIP CHIP DEVICES; MULTILAYERS; PRINTED CIRCUIT BOARDS; SURFACE MOUNT TECHNOLOGY; THERMAL EXPANSION; WSI CIRCUITS;

COEFFICIENT OF THERMAL EXPANSION; ELECTRONICS ASSEMBLY; HIGH DENSITY INTERCONNECT; MULTILAYER PRE ENCAPSULATION TECHNOLOGY; WAFER SCALE UNDERFILL;

ENCAPSULATION;

EID: 0034825920     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. How to select underfill materials for solder bumped flip chips on low cost substrates?
2. Cyanate-Bismaleimide - Epoxy resin compositions for flip chip, BGA, and CSP pre-encapsulation
3. No-flow fluxing underfill process characterization