SCOPUS 정보 검색 플랫폼

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2001, Pages 13-22

A synthesis of memory mechanisms for distributed architectures

(3) Zhu, J a Hoeflinger, J a Padua, D a

a University of Illinois at Urbana Champaign (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; DATA FLOW ANALYSIS; DATA REDUCTION; DIGITAL STORAGE; MULTIPROCESSING PROGRAMS; MULTIPROGRAMMING; OPTIMIZATION; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS; REAL TIME SYSTEMS;

DISTRIBUTED MEMORY MULTIPROCESSORS; DISTRIBUTED-SHARED MEMORY (DSM) SOFTWARE SYSTEMS;

DISTRIBUTED COMPUTER SYSTEMS;

EID: 0034825253 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1145/377792.377799 Document Type: Conference Paper

Times cited : (6)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.