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Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 2001, Pages 225-229

Logic optimization and code generation for embedded control applications

(2) Jiang, Y a Brayton, R K a

a UNIVERSITY OF CALIFORNIA (United States)

Author keywords

Code generation; Esterel; Logic optimization; MDD; Multiple valued

Indexed keywords

CODES (SYMBOLS); COMPUTER AIDED DESIGN; COMPUTER CONTROL SYSTEMS; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SOFTWARE; LOGIC DESIGN; MULTIPLEXING EQUIPMENT; OPTIMIZATION; PROGRAM COMPILERS;

EMBEDDED CONTROL SYSTEMS; LOGIC OPTIMIZATION;

EMBEDDED SYSTEMS;

EID: 0034821918 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1145/371636.371735 Document Type: Conference Paper

Times cited : (2)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.