Fast parallel in-memory 64-bit sorting

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2001, Pages 114-122

  Jimenez Gonzalez D ^a   Navarro, J J ^a   Larriba Pey, J L ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

Avoid unnecessary sorting; Load balance; Parallel sorting; Radix sort; Reduction of communication

Indexed keywords

BINARY CODES; CACHE MEMORY; COMPUTER ARCHITECTURE; DATA ACQUISITION; DATA REDUCTION; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS;

PARALLEL IN-MEMORY SORTING;

SORTING;

EID: 0034818250     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/377792.377816     Document Type: Conference Paper

References (13)

1. LogGP: Incorporating long messages into the LogP Model-One step closer towards a realistic model for parallel computation
2. A comparison of sorting algorithms for the Connection Machine CM-2
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5. Parallel algorithms for personalized communication and sorting with an experimental study
6. Communication and cache conscious radix sort
7. On the versatility of parallel sorting by regular sampling
8. Parallel sorting by regular sampling
9. Load balanced parallel radix sort