A 0.13μm CMOS platform with Cu/low-k interconnects for system on chip applications

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue TECHNOLOGY SYMP., 2001, Pages 101-102

  Schiml, T ^a   Biesemans, S ^a   Brase, G ^a   Burrell, L ^a   Cowley, A ^a   Chen, K C ^a   Ehrenwall, A V ^a   Ehrenwall, B V ^a   Felsner, P ^a   Gill, J ^a   Grellner, F ^a   Guarin, F ^a   Han, L K ^a   Hoinkis, M ^a   Hsiung, E ^a   Kaltalioglu, E ^a   Kim, P ^a   Knoblinger, G ^a   Kulkarni, S ^a   Leslie, A ^a   Mono, T ^a   Schafbauer, T ^a   Schroeder, U ^a   Schruefer, K ^a   Spooner, T ^a   Warner, D ^a   Wang, C ^a   Wong, R ^a   Demm, E ^a   Leung, P ^a   Stetter, M ^a   Wann, C ^a   Chen, J K ^a   Crabbe E ^a   more..

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; LITHOGRAPHY; MIM DEVICES; RESISTORS; STATIC RANDOM ACCESS STORAGE;

COPPER INTERCONNECTS; SYSTEM ON CHIP TECHNOLOGY;

CMOS INTEGRATED CIRCUITS;

EID: 0034790426     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)