A pulse-tuned charge controlling scheme for uniform main and reference bitline voltage generation on 1T1C FeRAM

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2001, Pages 125-126

  Kang, H B ^a   Kye, H W ^a   Kim, D J ^a   Lee, G I ^a   Park, J H ^a   Wee, J K ^a   Lee, S S ^a   Hong, S K ^a   Kang, N S ^a   Chung, J Y ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITORS; LASER TUNING; MICROPROCESSOR CHIPS;

SENSING OPERATION SIGNAL (SAE);

RANDOM ACCESS STORAGE;

EID: 0034790370     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)