A manufacturable 25nm planar MOSFET technology

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue TECHNOLOGY SYMP., 2001, Pages 33-34

  Ponomarev, Y V ^a   Loo, J J G P ^a   Dachs, C J J ^a   Cubaynes, F N ^a   Verheijen, M A ^a   Kaiser, M ^a   Van Berkum, J G M ^a   Kubicek, S ^a   Bolk, J ^a   Rovers, M ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); LITHOGRAPHY; SEMICONDUCTING SILICON; SEMICONDUCTOR JUNCTIONS;

GATE LENGTHS;

MOSFET DEVICES;

EID: 0034784917     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)