Some properties of division factor sequences in fractional phase locked loops

AEU-Archiv fur Elektronik und Ubertragungstechnik

Volumn 55, Issue 5, 2001, Pages 329-336

  Musch, Thomas ^a   Schiek, Burkhard ^a  

^a RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

Fractional PLL; Frequency synthesis; Low phase noise

Indexed keywords

DIFFERENTIATION (CALCULUS); DIGITAL TO ANALOG CONVERSION; FAST FOURIER TRANSFORMS; FREQUENCY DIVIDING CIRCUITS; FREQUENCY SYNTHESIZERS; INTEGRATION; PHASE SHIFTERS; TRANSFER FUNCTIONS; MATHEMATICAL MODELS; SPURIOUS SIGNAL NOISE; SWITCHING; TUNING;

DIVISION FACTOR SEQUENCE; FRACTIONAL DIVISION CIRCUIT; FRACTIONAL PHASE LOCKED LOOP; LOW PHASE NOISE; PROGRAMMABLE FREQUENCY DIVIDER; FRACTIONAL-PLL; FREQUENCY SYNTHESIS;

PHASE LOCKED LOOPS;

EID: 0034761649     PISSN: 00011096     EISSN: None     Source Type: Journal    
DOI: 10.1078/1434-8411-00049     Document Type: Article

References (5)

1. The common denominators in fractional N
2. Improvements in or relating to electrical frequency control arrangements
3. A multiple modulator fractional divider