40 Gbit/s fully monolithic clock recovery IC using InAlAs/InGaAs/InP HEMTs

Electronics Letters

Volumn 36, Issue 19, 2000, Pages 1617-1618

  Murata, K ^a   Yamane, Y ^b  

^a NTT Network Innovation Laboratories   (Japan)

^b NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FLIP FLOP CIRCUITS; GATES (TRANSISTOR); MONOLITHIC INTEGRATED CIRCUITS; SEMICONDUCTING ALUMINUM COMPOUNDS; SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE;

CLOCK RECOVERY CIRCUIT (CRC); PSEUDO-RANDOM BIT SEQUENCE (PRBS);

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 0034648548     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20001163     Document Type: Article

References (7)

1. WANG, Z.-G., BERROTH, M., THIEDE, A., RIEGER-MOTZER, M., HOFMANN, P., HÜLSMANN, A., KÖHLER, K., RAYNOR, B., and SCHNEIDER, J.: '40 and 20Gbit/s monolithic integrated clock recovery using a fully-balanced narrowband regenerative frequency divider with 0.2μm AlGaAs/GaAs HEMTs', Electron. Lett., 1996, 32, (22), pp. 2081-2082
2. LANG, M., WANG, Z., THIEDE, A., LIENHART, H., JAKOBUS, T., BRONNER, W., HORNUNG, J., and HÜLSMANN, A.: 'A complete GaAs HEMT single chip data receiver for 40Gbit/s data rates', IEEE GaAs Symp. Tech. Dig., 1998, pp. 55-58
3. WANG, Z.-G., THIEDE, A., SCHLECHTWEG, M., LIENHART, H., HÜLSMANN, A., RAYNOR, B., SCHNEIDER, J., and JAKOBUS, T.: '40Gbit/s/GHz clock recovery and frequency multiplying AlGaAs GaAs-HEMT-IC using injection-synchronised narrowband ring-VCOs and auxiliary PLLs', Electron. Lett., 1999, 35, (14), pp. 1151-1152
4. MURATA, K., and OTSUJI, T.: 'A novel clock recovery circuit for fully monolithic integration', IEEE Trans. Microw. Theory Tech., 1999, 47, (12), pp. 2528-2533
5. MURATA, K., OTSUJI, T., OHHATA, M., TOGASHI, M., SANO, E., and SUZUKI, M.: 'A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19Gb/s decision circuit using 0.2μm GaAs MESFET', IEEE J. Solid-State Circuits, 1995, 30, (10), pp. 1101-1108
6. ENOKI, T., ITO, H., IKUTA, K., and ISHII, Y.: '0.1 μm InAlAs/InGaAs HEMT with an InP-recess-etch stopper grown by MOCVD', Int. Conf. Indium Phosphide and Related Materials, Hokkaido, Japan, 1995, pp. 81-84
7. OTSUJI, T., YONEYAMA, M., IMAI, Y., ENOKI, T., and UMEDA, Y.: '64Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs', Electron. Lett., 1997, 33, (17), pp. 1488-1489