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Volumn , Issue , 2000, Pages 65-70

Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems

Author keywords

COTS; Embedded; MAGIC; Middleware; MPI; MPI RT; Multiprocessing; Parallel processing; Real time; Specification and design methodology; VCC; Virtual Component Co design; VSIPL

Indexed keywords

COMPUTER HARDWARE; EMBEDDED SYSTEMS; MIDDLEWARE; PARALLEL PROCESSING SYSTEMS; REAL TIME SYSTEMS;

EID: 0034592339     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/354880.354890     Document Type: Conference Paper
Times cited : (2)

References (8)
  • 1
    • 78149326542 scopus 로고    scopus 로고
    • A new development framework based on efficient middleware for real-time embedded heterogeneous multicomputers
    • Nashville, Tennessee
    • R. Janka, "A New Development Framework Based on Efficient Middleware for Real-Time Embedded Heterogeneous Multicomputers," presented at 1999 IEEE Conference and Workshop on Engineering of Computer-Based Systems (ECBS '99), Nashville, Tennessee, 1999.
    • (1999) 1999 IEEE Conference and Workshop on Engineering of Computer-Based Systems (ECBS '99)
    • Janka, R.1
  • 2
    • 0012954412 scopus 로고    scopus 로고
    • Models of computation for specification and design methodology frameworks for parallel and distributed real-time embedded multiprocessor signal processing systems
    • Las Vegas, NV
    • R. Janka, "Models of Computation for Specification and Design Methodology Frameworks for Parallel and Distributed Real-Time Embedded Multiprocessor Signal Processing Systems," presented at The 1999 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'99), Las Vegas, NV, 1999.
    • (1999) The 1999 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA'99)
    • Janka, R.1
  • 4
    • 0012953160 scopus 로고    scopus 로고
    • DARPA and the Navy, Draft
    • VSIPL Forum, "VSIPL v1.0 API Standard Specification," DARPA and the Navy, Draft http://www.vsipl.org/PubInfo/pubdrftrev.html, 1999.
    • (1999) VSIPL v1.0 API Standard Specification
  • 6
    • 0000040686 scopus 로고    scopus 로고
    • Rapid prototyping of application specific signal processors
    • S. Y. Kung, Ed., 1 ed. Dordrecht, The Netherlands: Kluwer Academic Publishers
    • M. A. Richards, A. J. Gadient, and G. A. Frank, "Rapid Prototyping of Application Specific Signal Processors," in Journal of VLSI Signal Processing, vol. 15, S. Y. Kung, Ed., 1 ed. Dordrecht, The Netherlands: Kluwer Academic Publishers, 1997, pp. 200.
    • (1997) Journal of VLSI Signal Processing , vol.15 , pp. 200
    • Richards, M.A.1    Gadient, A.J.2    Frank, G.A.3
  • 7
    • 0012960155 scopus 로고    scopus 로고
    • Cadence Design Systems, Inc. [Online], August 14
    • Cadence Design Systems, Inc. "Cierto Virtual Component Co-design (VCC) Environment," Cadence Design Systems, Inc. [Online], August 14, 2000. Available HTTP: http://www.cadence.com/datasheets/vcc_environment.html.
    • (2000) Cierto Virtual Component Co-design (VCC) Environment
  • 8
    • 0012903869 scopus 로고    scopus 로고
    • Co-design made real: Generating and verifying complete system and software implementations
    • San Jose, CA
    • M. Baker and E. O'Brien-Strain, "Co-Design Made Real: Generating and Verifying Complete System and Software Implementations," presented at Embedded Systems Conference, San Jose, CA, 1999.
    • (1999) Embedded Systems Conference
    • Baker, M.1    O'Brien-Strain, E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.