High controllability and low cost APM process by one-bath type wet-bench for multi gate oxide pre-cleaning

IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings

Volumn , Issue 1, 2000, Pages 321-324

  Suzuki, Tatsuya ^a   Kunishima, Hiroyuki ^a   Wake, Tomoko ^a   Chikaki, Shinichi ^a  

^a NEC CORPORATION   (Japan)

Author keywords

APM; Cost; Etching rate controllability; Multi gate oxide; One bath type wet bench; Performance

Indexed keywords

CONTROLLABILITY; COST BENEFIT ANALYSIS; ETCHING; GATES (TRANSISTOR);

MULTI-GATE OXIDES;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0034583835     PISSN: 1523553X     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISSM.2000.993678     Document Type: Article

References (2)

1. A 0.13um CMOS technology integrating high-speed and low power/high density devices with two different well/channel structures
2. How do we apply dilute APM to the wet cleaning process in VLSI manufacturing