Incremental system verification and synthesis of minimally restrictive behaviours

Proceedings of the American Control Conference

Volumn 6, Issue , 2000, Pages 4056-4061

  Brandin, B ^a   Malik, R ^a   Dietrich, P ^b  

^a SIEMENS AG   (Germany)

^b Rheinland Pfälzische Technische Universität Kaiserslautern Landau   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COUNTER EXAMPLES; ENTIRE SYSTEM; FINITE-STATE AUTOMATA; INCREMENTAL APPROACH; SAFETY PROPERTY; SYSTEM VERIFICATIONS;

CONTROL; CONTROL SYSTEM SYNTHESIS; CONTROL THEORY; DISCRETE TIME CONTROL SYSTEMS; FINITE AUTOMATA; ITERATIVE METHODS;

AUTOMATA THEORY; SYSTEM STABILITY;

DISCRETE EVENT SYSTEMS; FINITE STRING LANGUAGES; INCREMENTAL SYSTEM VERIFICATION; RESTRICTIVE BEHAVIORS; SUPERVISORY CONTROL THEORY;

EID: 0034548510     PISSN: 07431619     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ACC.2000.876984     Document Type: Conference Paper

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