Chip-level simulation for CDM failures in multi-power ICs

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 2000, Pages 456-464

  Lee, Jaesik ^a   Huh, Yoonjong ^a   Chen, Jau Wen ^a   Bendix, Peter ^a   Kang, Sung Mo ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CHARGE; ELECTRIC DISCHARGES; MICROPROCESSOR CHIPS; SEMICONDUCTOR DEVICE MODELS;

CHARGED DEVICE MODELS (CDM); ELECTROSTATIC DISCHARGES (ESD);

POWER INTEGRATED CIRCUITS;

EID: 0034548148     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)