aSOC: a scalable, single-chip communications architecture

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2000, Pages 37-46

  Liang, Jian ^a   Swaminathan, Sriram ^a   Tessier, Russell ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE SYSTEMS; COMPUTER SIMULATION; DATA COMMUNICATION SYSTEMS; DATA TRANSFER; DIGITAL SIGNAL PROCESSING; INTERCONNECTION NETWORKS; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS); SCHEDULING;

ADAPTIVE SYSTEM-ON-A-CHIP; INTERCONNECT ARCHITECTURE; PARALLEL SIMULATION;

COMPUTER ARCHITECTURE;

EID: 0034512994     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)