Combined selection of tile sizes and unroll factors using iterative compilation

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2000, Pages 237-246

  Kisuki, T ^a   Knijnenburg, P M W ^a   O'boyle M F P ^b  

^a LEIDEN UNIVERSITY   (Netherlands)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; GENETIC ALGORITHMS; ITERATIVE METHODS; OPTIMIZATION; PROGRAM COMPILERS; RANDOM PROCESSES; SEMANTICS; SIMULATED ANNEALING;

INSTRUCTION LEVEL PARALLELISM; ITERATIVE COMPILATION; STRATEGY SPECIFICATION LANGUAGE; TRANSFORMATION DEFINITION LANGUAGE;

PARALLEL PROCESSING SYSTEMS;

EID: 0034512401     PISSN: 1089795X     EISSN: None     Source Type: Journal    
DOI: 10.1109/PACT.2000.888348     Document Type: Article

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