A VLSI implementation structure for wavelet decomposition filter

IEEE International Conference on Multi-Media and Expo

Volumn , Issue III/WEDNESDAY, 2000, Pages 1399-1402

  Shunjun, W ^a   Chao, W ^a   Yong, S ^a  

^a XIDIAN UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FAST FOURIER TRANSFORMS; SYSTOLIC ARRAYS; VLSI CIRCUITS; WAVELET TRANSFORMS;

WAVELET DECOMPOSITION FILTERS;

FIR FILTERS;

EID: 0034509358     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. Design of parallel adaptive fir filters
2. Multirate digital filters, filter banks, polyphase networks, and applications: A tutorial
3. Regular iterative algorithms and their implementation on processor arrays
4. Fast algorithm for discrete and continuous wavelet transforms
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6. Some aspects of non-stationary signal processing with emphasis on time-frequency and time -scale methods
7. A Theory for multiresolution signal decomposition: The wavelet representation
8. Multifrequency channel decompositions of images and wavelet models