On the study of logarithmic time parallel adders

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 2000, Pages 459-464

  Yeh, Wen Chang ^a   Jen, Chein Wei ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK TOPOLOGY; OPTIMIZATION;

ADDER ALGORITHM; CARRY-LOOKAHEAD; CONDITIONAL-SUM; LOGARITHMIC TIME PARALLEL ADDERS;

ADDERS;

EID: 0034507523     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)