Painless way to reduce power dissipation by over 18% in booth-encoded carry-save array multipliers for DSP

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 2000, Pages 571-580

  Yu, Zhan ^a   Wasserman, Larry ^a   Willson Jr , Alan N ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAYS; ENCODING (SYMBOLS); FIR FILTERS; PROGRAM COMPILERS;

BOOTH ENCODER; CADENCE SILICON ENSEMBLE; CARRY SAVE ARRAY MULTIPLIER; SYNOPSYS DESIGN COMPILER;

DIGITAL SIGNAL PROCESSING;

EID: 0034505676     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)