CPAM: A common power analysis methodology for high-performance VLSI design

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 2000, Pages 303-306

  Neely, J Scott ^a   Chen, Howard H ^a   Walker, Steven G ^a   Venuto, James ^a   Bucelot, Thomas J ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTROMIGRATION; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; SPURIOUS SIGNAL NOISE; THERMAL EFFECTS;

ON CHIP POWER DISTRIBUTION; POWER SUPPLY NOISE; THERMAL POWER;

VLSI CIRCUITS;

EID: 0034496877     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (2)