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Volumn , Issue , 2000, Pages 535-540
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Sacrificial metal wafer level burn-in KGD
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
CHIP SCALE PACKAGES;
DESIGN FOR TESTABILITY;
ELECTRIC PROPERTIES;
RELIABILITY;
TECHNOLOGICAL FORECASTING;
KNOWN GOOD DIE;
SACRIFICIAL METAL WAFER LEVEL BURN-IN;
STRATEGIC ENABLING TECHNOLOGY;
ELECTRONICS PACKAGING;
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EID: 0034482526
PISSN: 05695503
EISSN: None
Source Type: Journal
DOI: None Document Type: Article |
Times cited : (5)
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References (3)
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