Corona onset as a design optimization criterion for high voltage hardware

IEEE Transactions on Dielectrics and Electrical Insulation

Volumn 7, Issue 6, 2000, Pages 744-751

  Phillips, D B ^a   Olsen, R G ^a   Pedrow, P D ^a  

^a Washington State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; ELECTRIC FIELDS; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRODES; PRESSURE; SURFACES; TEMPERATURE;

CORONA ONSET OPTIMIZATION; HIGH VOLTAGE HARDWARE; SURFACE ELECTRIC FIELD;

ELECTRIC CORONA;

EID: 0034479079     PISSN: 10709878     EISSN: None     Source Type: Journal    
DOI: 10.1109/94.891984     Document Type: Article

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