Algorithm level RE-computing with shifted operands - a register transfer level concurrent error detection technique

IEEE International Test Conference (TC)

Volumn , Issue , 2000, Pages 971-978

  Wu, Kaijie ^a   Karri, Ramesh ^a  

^a POLYTECHNIC UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; COSINE TRANSFORMS; DIGITAL ARITHMETIC; ERROR DETECTION; FIR FILTERS; LOGIC GATES; PROGRAM COMPILERS; SHIFT REGISTERS;

CONCURRENT ERROR DETECTION; RECOMPUTING WITH SHIFTED OPERANDS; REGISTER TRANSFER LEVEL; TRIPLE MODULAR REDUNDANCY;

VLSI CIRCUITS;

EID: 0034478806     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (28)