Modeling and simulation of integrated capacitors for high frequency chip power decoupling

IEEE Transactions on Components and Packaging Technologies

Volumn 23, Issue 4, 2000, Pages 611-619

  Diaz Alvarez, Enrique ^b   Krusius, J Peter ^a,b   Kroeger, F ^c  

^a IEEE   (United States)

^b School of Operations Research and Industrial Engineering   (United States)

^c 3M COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP DECOUPLING CIRCUIT SIMULATION; CHIP POWER DECOUPLING; INTEGRATED CAPACITORS; PARTIAL ELEMENT EQUIVALENT CIRCUIT;

CAPACITORS; COMPUTER SIMULATION; EQUIVALENT CIRCUITS; INTEGRAL EQUATIONS; LAMINATING; MATHEMATICAL MODELS; MAXWELL EQUATIONS; MULTICHIP MODULES; MULTILAYERS; PRINTED CIRCUIT BOARDS;

SURFACE MOUNT TECHNOLOGY;

EID: 0034478788     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/6144.888843     Document Type: Article

References (8)

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