Programmable BIST architecture for clusters of multiple-port SRAMs

IEEE International Test Conference (TC)

Volumn , Issue , 2000, Pages 557-566

  Benso, Alfredo ^a   Di Carlo, Stefano ^a   Di Natale, Giorgio ^a   Prinetto, Paolo ^a   Bodoni, Monica Lobetti ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; INTEGRATED CIRCUIT TESTING; NETWORK PROTOCOLS; STATIC RANDOM ACCESS STORAGE;

ACCESS PROTOCOLS; MARCH ALGORITHM; MEMORY WRAPPERS;

BUILT-IN SELF TEST;

EID: 0034476236     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)