Exploring performance tradeoffs for clustered VLIW ASIPs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2000-January, Issue , 2000, Pages 504-510

  Jacome, Margarida F ^a   De Veciana, Gustavo ^a   Lapinskii, Viktor ^a  

^a The University of Texas at Austin   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; ECONOMIC AND SOCIAL EFFECTS; OPTIMIZATION; SIGNAL PROCESSING; VERY LONG INSTRUCTION WORD ARCHITECTURE; ALGORITHMS; COSINE TRANSFORMS; DATA COMMUNICATION SYSTEMS; MULTIMEDIA SYSTEMS; PARALLEL PROCESSING SYSTEMS;

ATTRACTIVE SOLUTIONS; CAPACITY CONSTRAINTS; CLUSTERED VLIW; COMPLEX OPTIMIZATION PROBLEMS; EMBEDDED APPLICATION; INTERCONNECT CAPACITY; PERFORMANCE TRADE-OFF; REALTIME MULTIMEDIA;

COMPUTER AIDED DESIGN;

APPLICATION SPECIFIC INSTRUCTION SET PROCESSORS; FUNCTIONAL UNITS; INSTRUCTION LEVEL PARALLELISM; TARGET LATENCY;

EID: 0034474909     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896523     Document Type: Conference Paper

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