Fabrication of self-aligned surface tunnel transistors with a 80-nm gate length

Japanese journal of applied physics

Volumn 39, Issue 12 B, 2000, Pages

  Chun, Yong Jin ^a   Uemura, Tetsuya ^a   Baba, Toshio ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON BEAM LITHOGRAPHY; FILM GROWTH; MOLECULAR BEAM EPITAXY; NEGATIVE RESISTANCE; THIN FILM TRANSISTORS; TUNNEL JUNCTIONS;

SELF-ALIGNED SURFACE TUNNEL TRANSISTORS;

GATES (TRANSISTOR);

EID: 0034474214     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.39.l1273     Document Type: Article

References (6)