Suppression of stress induced drain leakage current of SOI MOSFETs by using partial trench isolation technology

IEEE International SOI Conference

Volumn , Issue , 2000, Pages 80-81

  Iwamatsu, T ^a   Ipposhi, T ^a   Uchida, T ^a   Maegawa, S ^a   Inuishi, M ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

LEAKAGE CURRENTS; LOGIC DEVICES; RANDOM ACCESS STORAGE; SILICON ON INSULATOR TECHNOLOGY; STRESSES; THIN FILMS;

PARTIAL TRENCH ISOLATION (PTI) STRUCTURE;

MOSFET DEVICES;

EID: 0034472345     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)