Very linear ramp-generators for high resolution ADC BIST and calibration

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2000, Pages 908-911

  Wang, Jing ^a   Sanchez Sinencio, Edgar ^a   Maloberti, Franco ^a  

^a Texas AandM University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BUILT-IN SELF TEST; CALIBRATION; CAPACITORS; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; ERROR COMPENSATION; FAST FOURIER TRANSFORMS; RELAXATION OSCILLATORS;

DIGITAL TESTER; LINEAR VOLTAGE RAMP; MIXED SIGNAL TESTER; ON-CHIP CALIBRATION;

RAMP GENERATORS;

EID: 0034466238     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Linearity testing issues of analog to digital converters
2. Auto-calibrating analog timer for on-chip testing
3. Simple CMOS voltage follower with resistive-load drivability
4. Automatic swing control in relaxation oscillators
5. A 4 Hz lowpass continuous-time filter