The on-the-fly circuits that can be applied to array multiplier and fast gray code adder

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 2000, Pages 342-345

  Chang, Tsin Yuan ^a   Huang, Jing Reng ^a   Lo, Hao Yung ^a   Wang, Po Sen ^a   Yang, Kai ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CARRY LOGIC; DIGITAL SIGNAL PROCESSING; MULTIPLYING CIRCUITS; TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

ARRAY MULTIPLIER; CARRY SAVE MULTIPLIER; FAST GRAY CODE ADDER; ON THE FLY CIRCUITS;

ADDERS;

EID: 0034466059     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. A two's complement parallel array multiplication algorithm
2. nxn carry save multipliers without final addition
3. On-the-fly conversion of redundant into conventional representations
4. Fast multiplication without carry propagate addition
5. Saving power in the control path of embedded processors
6. New efficient designs for XOR and XNOR functions on the transistor level
7. Comparison and analysis of three implementations of nxn on-the-fly conversion