Behavioral modeling and simulation of phase-locked loops for RF front ends

Midwest Symposium on Circuits and Systems

Volumn 1, Issue , 2000, Pages 194-197

  Hinz, Michael ^a   Könenkamp, Ingo ^a   Horneber, Ernst Helmut ^a  

^a TECHNICAL UNIVERSITY OF BRAUNSCHWEIG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; FREQUENCY DOMAIN ANALYSIS; FREQUENCY SYNTHESIZERS; MATHEMATICAL MODELS; NATURAL FREQUENCIES; NONLINEAR EQUATIONS; SPECTRUM ANALYSIS; TIME DOMAIN ANALYSIS;

BEHAVIORAL MODELING; BEHAVIORAL SIMULATION; NONLINEAR BLOCK MODELS; RESONANT FREQUENCY FRONT ENDS;

PHASE LOCKED LOOPS;

EID: 0034464226     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. An introduction to the PLL library
2. Steady-state methods for simulating analog and microwave circuits
3. Monolithic phase-locked loops and clock recovery circuits
4. Digital PLL frequency synthesizers, theory and design